SmartNICs: State of the Art, State of the Practice, and Horizon

The past few years have witnessed a surge in the number of advanced network adapters, known as "SmartNICs", that offer additional functionalities beyond standard packet processing capabilities. These devices often feature programmable lightweight processing cores, FPGAs, and even CPU- and GPU-based platforms capable of running separate operating systems. Though primarily aimed at data center operations, such as infrastructure management, packet filtering, security, and I/O acceleration, SmartNICs are increasingly being explored for high-performance computing (HPC) application acceleration. This BoF is intended to be an open forum of discussion of the practical suitability of SmartNICs within the HPC community. We intend to drive the flow of the discussions from state of the art devices, software ecosystems supporting them, and applications, to upcoming hardware and desired capabilities. BoF presenters include representatives from the most relevant industrial and academic actors in the field. This includes hardware vendors such as NVIDIA, academic software developers such as BSC, and application developers such as Georgia Tech. These will cover broad-range experience from designing SmartNIC hardware and software to using SmartNICs in HPC, as well as supporting SmartNIC HPC users.

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Contributors:

• Oscar Hernández