Second Workshop on Communication, I/O, and Storage at Scale on Next-Generation Platforms - Scalable Infrastructures -
Thursday, May 25, 2023 9:00 AM to 6:00 PM · 9 hr. (Europe/Berlin)
Hall Y4 - 2nd Floor
Workshop
Emerging HPC Processors and AcceleratorsExascale SystemsManaging Extreme-Scale ParallelismMemory and Storage TechnologyParallel Programming Languages
Information
Next-generation HPC platforms must have to deal with increasing heterogeneity in their subsystems. These subsystems include internal highspeed fabrics for inter-node communication; storage system possibly integrated with programmable data processing units (DPUs) and infrastructure processing units (IPUs) to support software-defined networks; traditional storage infrastructures with global parallel POSIX-based filesystems complemented with scalable object stores; and heterogeneous compute nodes configured with a diverse spectrum of CPUs and accelerators (e.g., GPU, FPGA, AI processors) having complex intra-node communication.
The workshop will pursue multiple objectives, including:
(1) develop and provide a holistic overview of next-generation platforms with an emphasis on communication, I/O, and storage at scale,
(2) showcase application-driven performance analysis with various HPC fabrics,
(3) present early experiences with emerging storage concepts like object stores using next-generation HPC fabrics,
(4) share experience with performance tuning on heterogeneous platforms from multiple vendors, and
(5) be a forum for sharing best practices for performance tuning of communication, I/O, and storage to improve application performance at scale and any challenges.
Contributors:
Contributors:
Format
On-site
Targeted Audience
The workshop intends to attract system architects, code developers, research scientists, system providers, and industry luminaries who are interested in learning about the interplay of next-generation hardware and software solutions for communication, I/O, and storage subsystems tied together to support HPC and data analytics, and how to use them effectively.
Beginner Level
50%
Intermediate Level
40%
Advanced Level
10%
Speakers
Amit Ruhela
ManagerTACC, University of Texas at AustinJoseph C Curley
Vice President and General ManagerIntelSamuel Bernardo
Software EngineerLIPYinzhi Wang
Manager, HPC Performance & ArchitecturesTexas Advanced Computing CenterJS
John Swinburne
Principal Solution Architect EMEACornelis NetworksSPR
Sai Prabhakar Rao Chenna
HPC AI Software Solutions EngineerIntel CorporationDC
Dean Chester
Simulation and Modelling LeadCornelis NetworksJDM
John D. McCalpin
Research ScientistTexas Advanced Computing Center, University of Texas at AustinMichael Hennecke
Principal Engineer - HPC StorageIntel Deutschland GmbHR. Glenn Brook
Principal Solution Architect (Americas)Cornelis Networks, Inc.; University of Tennessee