2nd International Workshop on Malleability Techniques Applications in High-Performance Computing

2nd International Workshop on Malleability Techniques Applications in High-Performance Computing

Thursday, May 25, 2023 2:00 PM to 6:00 PM · 4 hr. (Europe/Berlin)
Hall Y5 - 2nd Floor
Workshop
Exascale SystemsMemory and Storage TechnologyParallel Programming LanguagesPerformance Modeling and Tuning

Information

The current static usage model of HPC systems is becoming increasingly inefficient. As a consequence, we see a rise in research on malleable systems, which can adjust computing and I/O resources usage dynamically in order to extract a maximum of efficiency. However, maximizing performance still requires careful control to avoid congestion. By providing an intelligent global coordination of resources usage, through runtime scheduling of computation, network usage and I/O across all components of the system architecture, malleable HPC systems can maximize the exploitation of their resources, while at the same time minimizing the makespan of applications in many, if not most, cases. Such malleable systems face a series of challenges: who initiates changes in resource availability or usage? How to compute the optimal usage? How can applications cope with dynamically changing resources? What should malleable programming models and abstractions look like? How to design resource management frameworks for malleable systems? Which resources benefit from malleability? To address these challenges, the HPCMALL workshop will bring together HPC researchers that are actively pursuing malleability concepts, from application developers to system architects, from programming model to system software researchers. HPCMALL will provide a discussion forum for researchers working in HPC and malleability.
Format
On-site
Targeted Audience
HPCMALL is oriented to the HPC community interested in malleability aspects of large-scale HPC systems, including computing and storage malleability. Hardware, resource managements, scheduling algorithms for CPU and I/O, programming models, ad-hoc storage systems, mechanisms to export facilities to applications, and application developments with strong focus on malleability are welcome.