Accelerating HPC using Deep Learning with IPU technology

HPC is undergoing a transformational change. Traditional methodologies are now increasingly accelerated using AI running on innovative hardware such as the IPU. The challenge lies in integrating AI into the HPC workflow so that it is complementary, efficient and offers real benefits. In this BoF, we will explore the possibilities of a hybrid system architecture capable of solving both HPC and AI problems. Such an architecture would need to utilise classic HPC platforms and dedicated AI chip systems, which is particularly important in the context of the challenges presented by new types of Exascale systems. Beyond just the implications at the chip level, we will also discuss the system functionality and software & algorithm optimisation, as well as performance. Through exploring the potential of this a heterogeneous system, we can invent a system capable of accelerating the most complex simulation problems. This system could be built using customized AI chips and systems, leveraging Graphcore’s IPU to execute new hybrid algorithm accelerations. We will focus on the details of this invented system architecture, discussing its benefits, challenges and programming approach.

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Contributors:

• Pawel Gepner (Graphcore)
• Adam Krzywaniak (Graphcore)
• Hubert Chrzaniuk (Graphcore)