TCP Endpoint in FPGA
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Algo-Logic Systems' TCP Endpoint implements a full, reliable streaming network stack in FPGA logic. It allows applications in logic to be directly connected to Internet Protocol (IP) interfaces by opening, maintaining, and closing TCP Connections via Ethernet to other hardware or software endpoints.
The mature, reliable, and network-tested TCP Endpoint delivers high performance with ultra-low latency. It runs at the full 10 Gigabit Ethernet line rate with a clock speed synchronous with a MAC and application processing logic. It supports full duplex rates of 20 Gbps per instance. The implementation is portable between Intel and Xilinx FPGA devices and has been deployed on multiple platforms.
Algo-Logic’s TCP Endpoint is available as a pre-integrated component in low latency applications or as a standalone IP. It has been deployed in customer applications including pre-trade risk-checks, complete tick-to-trade applications, and other flow processing applications. Algo-Logic provides in-house engineering support to ensure complete solution delivery with support for end-system and application-level fastest deployments.
