Communication, I/O, and Storage at Scale on Next-Generation Platforms
Thursday, June 2, 2022 9:00 AM to 1:00 PM · 3 hr. 59 min. (Europe/Berlin)
Hall Y11 - 2nd Floor
Information
Next-generation HPC platforms must have to deal with increasing heterogeneity in their subsystems. These subsystems include internal high-speed fabrics for inter-node communication; storage system possibly integrated with programmable data processing units (DPUs) and infrastructure processing units (IPUs) to support software-defined networks; traditional storage infrastructures with global parallel POSIX-based filesystems complemented with scalable object stores; and heterogeneous compute nodes configured with a diverse spectrum of CPUs and accelerators (e.g., GPU, FPGA, AI processors) having complex intra-node communication.
The workshop will pursue multiple objectives, including:
(1) develop and provide a holistic overview of next-generation platforms with an emphasis on communication, I/O, and storage at scale,
(2) showcase application-driven performance analysis with various HPC fabrics,
(3) present early experiences with emerging storage concepts like object stores using next-generation HPC fabrics,
(4) share experience with performance tuning on heterogeneous platforms from multiple vendors, and
(5) be a forum for sharing best practices for performance tuning of communication, I/O, and storage to improve application performance at scale and any challenges.
Organizers:
The workshop will pursue multiple objectives, including:
(1) develop and provide a holistic overview of next-generation platforms with an emphasis on communication, I/O, and storage at scale,
(2) showcase application-driven performance analysis with various HPC fabrics,
(3) present early experiences with emerging storage concepts like object stores using next-generation HPC fabrics,
(4) share experience with performance tuning on heterogeneous platforms from multiple vendors, and
(5) be a forum for sharing best practices for performance tuning of communication, I/O, and storage to improve application performance at scale and any challenges.
Organizers:
- Maria Girone (CERN)
- Thomas Steinke (Zuse Institute Berlin (ZIB))
- Amit Ruhela (Texas Advanced Computing Center)
- Estela Suarez (Forschungszentrum Juelich GmbH - Juelich Supercomputing Centre)
Format
On-site
Speakers
Johann Lombardi
Senior Principal EngineerIntelMatthew Curry
Principal Member of Technical StaffSandia National LaboratoriesSC
Steffen Christgau
HPC Consultant / Research AssociateZuse Institute BerlinJPE
James P. Erwin
Technical Lead, Software Enabling and Optimization EngineerIntel Corp.David Martin
Manager, Industry Partnerships and OutreachArgonne National LaboratoryEstela Suarez
ProfessorForschungszentrum Juelich GmbHDouglas Fuller
VP Software EngineeringCornelis Networks