RISC-V International

Exhibitor

Information

RISC-V: The Free and Open RISC Instruction Set Architecture

RISC-V is the free and open ISA
… Driven through Open collaboration
… Enabling freedom of design across all domains and industries
… Cementing the strategic foundation of semiconductors

Welcome to the Open era of computing!

RISC-V International is a non-profit organization supporting the free and open RISC instruction set architecture and extensions. We enable open community collaboration, technology advancements in the RISC-V ecosystem, and visibility of RISC-V successes.
ISC-V International is a non-profit organization supporting the free and open RISC instruction set architecture and extensions. We enable open community collaboration, technology advancements in the RISC-V ecosystem, and visibility of RISC-V successes.

ISC 2021 Digital Highlights

The RISC-V Special Interest Group on High-Performance Computing (SIG-HPC) was formed to address the requirements of the HPC community and align the RISC-V ISA. The SIG is a global committee that works on enabling HPC with the RISC-V ISA and its goal is to enable RISC-V in a broader set of new software and hardware opportunities in the high-performance computing space, supercomputers to the edge, and the software ecosystem required to run legacy and emerging (AI/ML/DL) HPC workloads. First, the SIG defined HPC to provide overall group scope and define the target markets, users, and applications. With this definition and scope, the interests of the SIG-HPC were rank-ordered to provide high-impact results, from discovery and gap analysis to implementation. In order to accomplish this, two things need to take place: 1) Plot a path to becoming competitive and 2) Extend that path to lead the community with new features and capabilities.