Cerebrus Intelligent Chip Explorer

Cerebrus Intelligent Chip Explorer

EDA

Information

The Cadence® Cerebrus™ Intelligent Chip Explorer is a new machine learning (ML)-based tool that automates and scales digital chip design, enabling customers to efficiently achieve demanding chip design goals. The combination of Cerebrus and the Cadence RTL-to-signoff flow offers advanced chip designers, CAD teams, and IP developers the ability to improve engineering productivity by up to 10X versus a manual approach while also realizing up to a 20% better power, performance, and area (PPA).
Cadence Design SystemsCadence’s goal is to empower engineers at semiconductor and systems companies to create innovative, intelligent, and highly differentiated electronic products that transform the way people live, work, and play. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to systems—in AI, IoT, mobile, 5G, consumer, cloud, data center, automotive, aerospace, and other market segments. Cadence offers specialized IP with industry-leading performance, power efficiency, and interconnects, as well as AI-specific verification and implementation solutions. The company also employs machine learning within its tools and solutions to enable the best power, performance, and area (PPA), quality of results (QoR), and time-to-market (TTM) benefits.

Log in