Speedster®7t FPGAs
AI Accelerators – Inference (Data Center)
Information
The Speedster®7t FPGA family is optimized for high-bandwidth workloads and eliminates the performance bottlenecks associated with traditional FPGAs. Built on TSMC’s 7nm FinFET process, Speedster7t FPGAs feature a revolutionary new 2D network-on-chip (2D NoC), an array of new machine learning processors (MLPs) optimized for high-bandwidth and artificial intelligence/machine learning (AI/ML) workloads, high-bandwidth GDDR6 interfaces, 400G Ethernet and PCI Express Gen5 ports — all interconnected to deliver ASIC-level performance while retaining the full programmability of FPGAs.
Speedster7t FPGA Highlights
* Built on TSMC 7nm process technology
* 363K to 2.6M 6-input LUTs
* Up to 385 megabits of embedded memory
* Up to 16 GDDR6 channels delivering up to 4 Tbps of high-speed memory
bandwidth
* Up to 72 SerDes lanes supporting data rates of 1 Gbps to 112 Gbps
* Up to 4 ports of 400G Ethernet (4× 400G or 16× 100G)
* Up to 2 ports of PCIe Gen5 supporting 16-lane (×16) and 8-lane (×8) configurations
* Revolutionary new two-dimensional network on chip (2D NoC) routing structure.
With ≥20 Tbps, this functionality fundamentally changes FPGA design
methodologies
* New flexible machine learning processor (MLP) optimized for AI/ML functionality:
– Delivers up to 41K Int8 MACs and 134 Int8 TOps
– Supports multiple floating point and integer numerical formats
